In order to increase the performance and integration level of integrated circuit chips, the feature size of devices are continuously reducing according to the Moore's Law, and has now been reduced to a nanometer scale. With the reduction in the device volume, the power consumption and leak current has become the biggest concern, and a series of effects that could be ignored in the MOSFET long channel model become more and more notable and even become dominant factors affecting the performance. Such phenomena are collectively called the short channel effect. The short channel effect may cause the degradation of the electrical properties of the device, for example, a drop in the gate threshold voltage, an increase in power consumption and a reduction in signal-to-noise ratio, etc.
In order to alleviate the short channel effect, a Super Steep Retrograde Well (SSRW) is introduced into the semiconductor field effect device. The Super Steep Retrograde Well has a low-high-low (or low-high) doping profile of the channel, the surface area of the channel maintains a low doping concentration, while a highly-doped area is formed in the area under the channel surface by an appropriate method, such as ion implantation, thus reducing the width of the depletion layer of the source/drain region and avoiding the short channel effects, such as an increased leak current caused due to source-drain punch-through, an increase in the threshold voltage and the like.
As for the MOS transistor structure, the Silicon on Insulator (SOI) structure has become a preferred structure for MOS devices of a deep sub-micron and nanometer level because it can well suppress the short channel effect and can enhance the capability of scaling down of the devices.
With the continuous development of the SOI technique, in a prior art document titled “Silicon-on-Nothing—an Innovative Process for Advanced CMOS” (IEEE Transactions on Electron Devices, Vol. 147, No. 11, 2000), Malgorzata Jurcazak, Thomas Skotnicki, M. Paoli, et. al. proposes a novel SOI device-SON (Silicon on Nothing) device structure in which a channel region is formed on a cavity.
SON (Silicon on Nothing) is an advanced technique developed by CEA-Leti in France and STMicroelectronics for the processing procedure of CMOS of a technical node of 90 nm and smaller, in which SON forms a local area Silicon on Insulator under the channel by means of a “cavity” structure, and the cavity may be an air gap or an oxide filling. Compared to the SOI device, the dielectric constant of the cavity structure is significantly reduced, thereby greatly reducing the influence from the two-dimensional electric field effect of a buried oxide layer and thus the DIBL effect. Moreover, good short channel properties and a more steep sub-threshold slope can be obtained by controlling the silicon film thickness and the cavity height, meanwhile, the self-heating effect of the SOI device can be alleviated. Bulk silicon may be used to replace the more expensive SOI wafer as the original wafer, so SON is considered as a preferred structure for replacing the SOI technique.
The most critical issue in the preparation of a SON device is how to prepare a cavity layer. At the time when the SON structure was first proposed, an epitaxial SiGe sacrifice layer technique was used. Afterwards, there are documents that provide methods for preparing the SON device by helium (He) ion implantation together with additional annealing or joint implantation of hydrogen-helium (H—He) ions together with additional annealing. The epitaxial SiGe sacrifice layer technique increases the process steps for manufacturing the device and increases the process complexity at the same time. With the reduction in the feature size of the device, requirements on the depth of the super-shallow junction of the device also makes ion implantation a difficult problem, so there are still many challenges to be overcome before actually applying the existing technique to the current manufacturing process for the very large scale integrated circuits.
Moreover, there are also many difficult technical problems concerning how to use the super steep retrograde well in the SON device to further suppress the short channel effect and improve the device performance.